The present disclosure relates to a semiconductor structure, and particularly to a finFET transistor including embedded planar source/drain stressors and a method of manufacturing the same.
Various attempts have been made to introduce stress to the channel of a fin field effect transistor (finFET) without much success. For example, wrapping a stressor material on both ends of a rectangular parallelepiped shaped semiconductor fin of a finFET has not been successful in providing a stress to the channel because the stress is applied to the source region or to the drain region within the wrapped semiconductor material along the direction perpendicular to the direction of the channel. While merging of multiple source regions or multiple drain regions of a plurality of parallel semiconductor fins with selective epitaxy is also known, raised source/drain regions formed by epitaxial merging of multiple source/drain regions are structurally non-uniform and not fully single crystalline, providing complications and process variations during further processing due to the non-uniformity and seams between multiple single crystalline portions.